Transmission power control circuit using w-cdma method

ABSTRACT

A difference between DELAY values of paths is compared and when the difference is below a predetermined value, the paths are assumed to be the same and SIRs estimated for these paths are compared to each other. The SIRs are multiplied by corresponding weighting coefficients and are added in an SIR addition circuit  7 . This eliminates erroneous recognition of one path as a plurality of paths, causing an enormous SIR after the addition and prevents deterioration of the line quality.

TECHNICAL FIELD

[0001] The present invention relates to an optimal transmission powercontrol circuit used in a W-CDMA communication system.

BACKGROUND ART

[0002] Hereinafter, a known transmission power control circuit using SIR(signal-Interference Power Ratio) in W-CDMA will be described withreference to drawings.

[0003] Conventionally, in transmission power control (hereinafterrefereed to as TPC), SIR of a received signal is measured in one of twostations and the SIR is compared with a predetermined SIR value. Whenthe SIR of the received signal is smaller than the predetermined SIRvalue, a request for increasing a power is output to the other station.On the other hand, when the SIR of the received signal is larger thanthe predetermined SIR value, a request for decreasing a power is outputto the other station.

[0004]FIG. 1 shows a known transmission power control circuit which usesSIR of a received signal. The known art shown in FIG. 1 is characterizedin that a path selection circuit 3 is not provided and that an SIRaddition circuit 12 adds all SIRs (x) input from an SIR estimationcircuit 6, compared to an embedment of the present invention (atransmission power control circuit shown in FIG. 2) which will bedescribed later. Now, the known art will be described, concentrating onthe difference between the known art and the embodiment of the presentinvention. Other features will be described in the embodiment of thepresent invention.

[0005] The SIR addition circuit 12 adds all SIRs (x) of all paths afterdespread. Therefore, for example, when Path (1) and Path (2) areactually one Path and when SIRs (x) include SIR (1)=0.5, SIR (2)=0.3,SIR (3)=0.1, and SIR (4)=0.1, the sum of these SIRs is 1.0.

[0006] However, in this case, the SIR of one Path is added twice (Path(1) and Path (2)). Therefore, the true sum of the SIRs must be 0.8.

[0007] Herein, when a target SIR value is 0.9, the true SIR is smallerthan the target value, and thus a request for increasing a power must beoutput to the other station. However, the measured SIR is 1.0, which islarger than the target value, and thus a request for decreasing a poweris output. As a result, the quality of signal is more and moredeteriorated disadvantageously.

[0008] An object of the present invention is to provide a transmissionpower control circuit in which the following problem can be solved. Thatis, when a path is erroneously detected as a plurality of paths, the SIRvalue of a received signal becomes larger than a target value.Accordingly, a request for decreasing a power is transmitted to theother station although the line quality is not actually improved. As aresult, the line quality is further deteriorated.

DISCLOSURE OF INVENTION

[0009] In the present invention, differences between paths arecalculated, and when paths whose difference is equal to or smaller thana predetermined value exist (hereinafter referred to as approximatepaths), the SIR values of those paths are compared, the SIR values areweighted based on the comparison result, and then the SIR values areadded.

[0010] For example, the SIRs of two approximate Path A and Path B areSIR_A and SIR_B, respectively. When SIR_A is larger than SIR_B,X*(SIR_A) and Y*(SIR_B) are added so as to obtain a sum SIR value. WhenX=1 and Y=0, SIR_B is ignored.

[0011] Accordingly, when a path is erroneously detected as a pluralityof paths and when the sum of SIRs becomes larger than the true sumvalue, a request for decreasing a transmission power for improvement ofsignal quality is not output to the other station.

[0012] A transmission power control circuit using the W-CDMA schemeaccording to the present invention includes an SIR estimation circuitfor estimating S/N ratio of each of 1 to N signals (N is an integerwhich is 1 or more) from a despread circuit and outputting estimationresults (hereinafter referred to as SIR values); and SIR addition meansfor adding the 1 to N SIR values output from the SIR estimation circuit.When a difference between delay values to an FR signal indicating aframe timing of paths among input 1 to N paths is equal to or smallerthan a predetermined value, the SIR addition means regards those pathsas the same, multiplies the 1 to N SIR values by corresponding weightingcoefficients, and then adds the SIR values.

[0013] The SIR Addition means includes an SIR addition circuit which isconnected to the output side of the SIR estimation circuit and whichadds the 1 to N SIR values output from the SIR estimation circuit; and apath selection circuit for checking whether or not approximate pathswhich have been received from a same antenna and which have apredetermined difference between delay values to the FR signal existbased on 1 to N pieces of input path information, and transmitting acontrol signal indicating approximation information to the SIR additioncircuit when at least two approximate paths exist.

[0014] The SIR addition circuit does not add all the SIR values from theSIR estimation circuit, but compares SIR values of approximate paths ifany based on the approximation information, and multiplies the SIRvalues by the corresponding weighting coefficients so as to add the SIRvalues.

[0015] The SIR addition circuit adds the SIR values by ignoring asmaller SIR value in the SIR values of the approximate paths afterweighting.

[0016] The transmission power control circuit further includes an SIRdecision circuit for comparing a result SIR value obtained by weightingand adding with a predetermined target SIR value so as to output a TPCbit indicating whether or not the result SIR value is larger than thetarget SIR value; and a transmission unit for writing the TPC bit in apredetermined place and transmitting the TPC bit to the other station.

[0017] The TPC bit requests decrease of a transmission power to theother station when the result SIR value is larger than the target SIRvalue, and requests increase of a transmission power to the otherstation when the result SIR value is smaller than the target SIR value.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018]FIG. 1 is a block diagram of a known transmission power controlcircuit using SIR of a received signal in W-CDMA.

[0019]FIG. 2 is a block diagram of a transmission power control circuitusing SIR of a received signal in W-CDMA according to an embodiment ofthe present invention.

[0020]FIG. 3 shows 1 to N1 pieces of path information Path (N1).

[0021]FIG. 4 shows an example of a path search result.

[0022]FIG. 5 shows the configuration of a selector circuit.

[0023]FIG. 6 shows the configuration of a despread circuit.

[0024]FIG. 7 shows data structures of CODE generator output and DELAYcircuit output when R3 (N1, t) is despread so as to output R4 (N1, t).

[0025]FIG. 8 shows a format of data transmitted/received between twostations.

[0026]FIG. 9 is a block diagram of the two stations, which measure SIRof a received signal, notify each other whether or not the SIR is largeror smaller than a target value by using a TPC unit, no as to control atransmission power.

BEST MODE FOR CARRYING OUT THE INVENTION

[0027] Hereinafter, a transmission power control circuit using SIR of areceived signal in W-CDMA according to an embodiment of the presentinvention will be described with reference to the drawings. FIG. 2 is ablock diagram showing the transmission power control circuit using SIRof a received signal in W-CDMA according to the embodiment of thepresent invention. In the following description, * representsmultiplication.

[0028] Signals R1 (M, t) are input to an up rate circuit 1 through 1 toM antennas, which convert radio signals to digital signals. R1 (M, t)means a signal input through antenna N at time t. The rate of each inputsignal is represented by a*Fc (Fc is chip rate). In this circuit, therate of each signal is further increased by b times. Then, signals R2(X, t) having the rate of a*b*Fc are output to a path search circuit 2and a selector circuit 4.

[0029] The path search circuit 2 detects the correlation value of eachof the input 1 to M signals R2 (M, t) by using a CODE predetermined withreference to an PA signal indicating a frame timing, and selects 1 to N1signals of higher correlation values.

[0030] Selected signals are output in parallel or in series as 1 to N1pieces of path information Path (N1) shown in FIG. 3. In the pathinformation, a SOURCE portion indicates the antenna through which thesignal has been input A DELAY portion indicates the deviation amount tothe FR signal. Since a multipath phasing signal is input to eachantenna, a plurality of paths may be selected from a SOURCE.

[0031]FIG. 4 shows an example of a path-search result. Herein, thenumber of antennas is 2 (M=2) and the number of searched paths are 10(N1=10). In FIG. 4, the number of selected effective paths is 4 (pathwhose SOURCE is 0 is ineffective), in which two paths have been selectedfrom each of the first and second antennas. As shown, the signals fromthe first antenna are delayed from the FR timing by “2” and “4”,respectively, and the signals from the second antenna are delayed by “5”and “9”, respectively. The unit of the DELAY portion is 1/(n1*n2*Fc).

[0032] As shown in FIG. 5, the selector circuit 4 includes 1 to N1selectors of M:1. The 1 to M signals are input to the selectors from theup rate circuit 1. Each selector selects a signal specified by theSOURCE portion of the path information and outputs the selected signalto a despread circuit 5 in the next stage.

[0033] When the path information shown in FIG. 4 is provided, theselectors 41 and 42 in FIG. 5 select signals R2 (1, t) from the firstantenna. The selectors 43 and 44 select signals R2 (2, t) from thesecond antenna. Output of other (N1−4) selectors is “0”.

[0034] The despread circuit 5 includes 1 to N1 multipliers, a CODEgenerator, and 1 to N1 DELAY circuits, as shown in FIG. 6. The CODEgenerator generates CODEs of a predetermined code length L insynchronization with FR timing signals. The DELAY circuit delays aninput CODE by a value of the DELAY portion of the path information.

[0035] For example, a CODE despreading R3 (1, t) is delayed by “2” inthe DELAY circuit, as shown in FIG. 7, since the DELAY valuecorresponding to this signal is “2”. The multipliers despread signals ofrate (a*b*Fc) by using the above-described CODE and output R4 (N1, t)whose signal rate is Fs. Fs represents a symbol rate.

[0036] An SIR estimation circuit 6 estimates the S/N ratio of each ofthe received 1 to N1 signals and outputs estimation results SIRs (x) toan SIR addition circuit 7 in the next stage. Herein, x is 1 to N1. Apath selection circuit 3 determines whether or not paths which have beenreceived from a same antenna and whose Delay values are approximate by apredetermined value exist based on the input path information.

[0037] For example, the threshold of approximation is set to “3”. In theexample shown in FIG. 4, the Delay values of the signals from the secondantenna are “5” and “9”, respectively. Thus, these signals aredetermined not to be approximate. On the other hand, the Delay values ofthe signals from the first antenna are “2”, and “4”, and thus thesesignals are determined to be approximate. In this case, a detectionsignal S2 is represented in the following way. Info (1; 11000 . . . 0),Info (2; 11000 . . . 0), Info (3; 00000 . . . 0), Info (4; 00000 . . .0), . . . , and Info (N1; 00000 . . .).

[0038] Info (1; 1100000 . . . 0) indicates whether or not a path whichis approximate to Path 1 exists, and indicates that Path 1 isapproximate to Path 2 in this case.

[0039] The SIR addition circuit 7 adds 1 to N1 SIR values (SIRs (x))input from the above-described SIR estimation circuit 6. However, all ofthe SIRs (x) are not added. Instead, the above-described approximationinformation info is referred to. If a path is approximate to anotherpath, the SIRs of the approximate paths are compared, and the SIRs (x)are multiplied by corresponding weighting coefficients and then areadded.

[0040] In the above-described example, since Path 1 is approximate toPath 2, SIR (1) is compared with SIR (2). When SIR (1) is larger thanSIR (2) and when weighting coefficients are 1 and 0, the sum of SIRs canbe represented by the following equation (1).

SIR=1*SIR(1)+0*SIR(2)+SIR(3)+SIR(4)  (1)

[0041] As can be understood from the equation, in this weighting method,a smaller SIR in the SIRs of the approximate paths is ignored. Thesummed SIR value is input to an SIR decision circuit 8. The SIR decisioncircuit 8 compares the input SIR with a given target SIR value andoutputs a TPC bit to an MUX circuit 9 in a transmission unit. When thesummed SIR is larger than the target SIR, the TPC bit is “0”, and whenthe summed SIR is mailer than the target SIR, the TPC bit is “1”.Herein, “1” represents a request for increasing a transmission power toanother station and “0” represents a request for decreasing atransmission power.

[0042] The MUX circuit 9 in the transmission unit 11 writes the TPC bitin a predetermined place as shown in FIG. 8 and notifies the otherstation.

[0043] Next, the operation of the above-described embodiment will bedescribed. FIG. 9 is a block diagram of two stations which arepreconditions of the present invention. FIG. 8 shows a format of datatransmitted/received between these stations. DATA 1 and DATA 2 in FIG. 8represent user data. A TPC portion indicates a transmission powercontrol request from the other station. In the transmission powercontrol circuit of the present invention, each of the two stations shownin FIG. 9 measures SIR of a received signal, notifies the other stationthat SIR is larger or smaller than the target value by using the TPCportion, and requests increase or decrease of the power depending on theSIR value.

[0044] The operation of the up rate circuit 1 and the path searchcircuit 2 shown in FIG. 2 has been described above and thus is notdescribed here. The selector circuit 4 selects necessary signals fromamong signals R2 (y, t) in accordance with the SOURCE portion of PATH(X), where y=1, 2, . . . , and M, and outputs R3 (x, t), where x=1, 2, .. . , and N1. “x” represents the number of searched paths (N1).

[0045] In the example shown in FIG. 4, two R2 (1, t) signals and two R2(2, t) signals are output. The remainder (N2−4) is 0. That is, therelationship between R2 (y, t) and R3 (x, t) is represented as follows.R3 (1, t)=R2 (1, t), R3 (2, t)=R2 (1, t), R3 (3, t)=R2 (2, t), R3 (4,t)=R2 (2, t), R3 (x)=0. Herein, x=5, 6, . . . , and N1.

[0046] The despread circuit 5 despreads R3 (x, t) in each path by usinga predetermined CODE and outputs signals R4 (x, t) of a symbol rate(Fs). As described above, the tang of a generated CODE is adjusted inaccordance with the DELAY value of path information PATH (x). AdjustedCODE is used as a despread code. The signal R4 (x, t) is represented bythe following equation (2). Herein, CODE of a code length L isrepresented by C(k) and a timing function of each Path based on theDELAY value is represented by t (x). t represents a t symbol.

R 4 (x, t)=Σ{R 3(x, k)*C(k−t(x))}  (2)

[0047] For example, in PATH (1), that is, when x=1, the DELAY value is“2” and thus t(1)=2. Accordingly, R4 (1, t) is represented by thefollowing equation (3).

R 4 (1, t)=Σ{R 3(1, k)*C(k−2)}  (3)

[0048] The SIR estimation circuit 6 calculates the S/N ratio of each ofinput signals R4 (x, t) and outputs SIR values SIRs (x).

[0049] The path selection circuit 3 checks whether ox not paths whichhave been received from a same antenna and whose timings are approximateto each other by a predetermined value (paths whose DELAY values areapproximate) exist based on the input 1 to N pieces of path informationPATH (x) When approximate paths exist, a control signal Info (x: z1, z2,. . . , and zN1) indicating that fact is transmitted to the SIR additioncircuit 7 in the next stage.

[0050] For example, when Path (1) is approximate to Path (2), z1 and z2in Info (1:, ,) and Info (2:, ,) is 1, that is, Info (1: 1, 1, 0, 0, . .. , 0) and Info (2: 1, 1, 0, 0, . . . , 0).

[0051] The SIR addition circuit 7 compares SIRs of the Paths in which zxis 1 based on the Info signal for the input SIRs (x) and performsweighting, so as to add the corresponding SIRs (x). For example, whenthe weighting coefficient is α(x) and when the path selection circuit 3determines that PATH (1) is approximate to PATH (2), the SIR additioncircuit 7 compares SIR (1) with SIR (2). When SIR (1) is larger than SIR(2), α(1)=1 and α(2)=0 are satisfied. In the opposite case, α(1)=0 andα(2)=1 are satisfied. When a PATH is approximate to no PATH, theweighting coefficient of SIR corresponding to the PATH is set to “1”.Then, 1 to N α(x)*SIRs(x) are added by using the following equation (4)and the result is output to the SIR decision circuit 8.

SIR=Σα(x)*SIRs(x)  (4)

[0052] The calculated SIR is compared with a predetermined target valueby the SIR decision circuit 8, which outputs a TPC bit indicating theresult. When the calculated SIR is smaller than the target value, thepolarity of the TPC bit is “1” so as to allow the other station toincrease a transmission power. Otherwise, the polarity of the TPC bit is“0”.

[0053] The MUX circuit 9 in the transmission unit 11 writes the TPC bitin transmission data and transmits the data to the other station.

INDUSTRIAL APPLICABILITY

[0054] According to the present invention, when one path is erroneouslyrecognized as a plurality of paths during path search, weighting isperformed depending on the value of each SIR, and if necessary, only thelargest SIR is added. Accordingly, the value of SIR does not becomeenormous erroneously.

[0055] In the known art, when one path is erroneously recognized as aplurality of paths, the sum of SIR values becomes larger than the truesum. In this case, a request for decreasing a transmission power isoutput to the other station although the signal quality is not improved,and as a result, the signal quality is further deteriorated. The presentinvention solves this problem. During path search, approximate paths maybe protected so that a path is not recognized as a plurality of paths.However, this method is not always optimal for estimating SIR, becausethe range of approximate paths at this time is determined so that manypaths can be added so as to obtain optimal data quality after receivingRAKE, which is usually used in W-CDMA (approximate paths are more likelyto be included). On the other hand, in the present invention, paths areselected based on other parameters before adding SIR values, and thus anoptimal parameter for SIR estimation can be determined.

[0056] Furthermore, path search is usually performed by using an averageof predetermined time, and thus the time of obtained path information isnot strictly the same as the time of data used for SIR estimation. Inthe present invention, even if the state of paths changes during thetime, paths can be correctly selected to some extent.

1. A transmission power control circuit using the W-CDMA scheme,comprising: an SIR estimation circuit for estimating S/N ratio of eachof 1 to N signals (N is an integer which is 1 or more) from a despreadcircuit and outputting estimation results (hereinafter referred to asSIR values); and SIR addition means for adding the 1 to N SIR valuesoutput from the SIR estimation circuit, wherein, when difference betweendelay values to an FR signal indicating a frame timing of paths amonginput 1 to N path is equal to or smaller than a predetermined value, theSIR addition means regards those paths as the same, multiplies the 1 toN SIR values by corresponding weighting coefficients, and then adds theSIR values.
 2. A transmission power control circuit using the W-CDMAscheme according to claim 1, wherein the SIR addition means comprises:an SIR addition circuit which is connected to the output side of the SIRestimation circuit and which adds the 1 to N SIR values output from theSIR estimation circuit; and a path selection circuit for checkingwhether or not approximate paths which have been received from a sameantenna and which have a predetermined difference between delay valuesto the FR signal exist based on 1 to N pieces of input path information,and transmitting a control signal indicating approximation informationto the SIR addition circuit when at least two approximate paths exist.3. A transmission power control circuit using the W-CDMA schemeaccording to claim 2, wherein: the SIR addition circuit does not add allthe SIR values from the SIR estimation circuit, but compares SIR valuesof approximate paths if any exist based on the approximationinformation, multiplies the SIR values by the corresponding weightingcoefficients, and then adds the SIR values.
 4. A transmission powercontrol circuit using the W-CDMA scheme according to claim 3, wherein:the SIR addition circuit adds the SIR values by ignoring a smaller SIRvalue in the SIR values of the approximate paths after weighting.
 5. Atransmission power control circuit using the W-CDMA scheme according toclaim 2, further comprising: an SIR decision circuit for comparing aresult SIR value obtained by weighting and adding with a predeterminedtarget SIR value so as to output a TPC bit indicating whether or not theresult SIR value is larger than the target SIR value; and a transmissionunit for writing the TPC bit in a predetermined place and transmittingthe TPC bit to the other station.
 6. A transmission power controlcircuit using the W-CDMA scheme according to claim 5, wherein: the TPCbit requests decrease of a transmission power to the other station whenthe result SIR value is larger than the target SIR value, and requestincrease of a transmission power to the other station when the resultSIR value is smaller than the target SIR value.